The group III nitride semiconductors, particularly GaN and AlGaN have a high dielectric breakdown voltage because of their wide band gaps. Furthermore, formation of heterostructures, such as an AlGaN/GaN structure, is easy. Piezoelectric charges generated by the difference in lattice constant between AlGaN and GaN as well as the difference in band gap cause high concentration of an electronic channel (a two dimensional electron gas (2DEG)) on a GaN layer-side of an interface between AlGaN and GaN, thereby enabling high-current and high-speed operation. Expectations for application of the group III nitride semiconductors to electron devices such as power field-effect transistors (FETs) and diodes have thus risen in recent years.
Because of its capability of performing high-current operation, a typical planar heterojunction FET (HFET) having the AlGaN/GaN structure, for example, an HFET with an Al composition of 25% and a thickness of 20 nm, might be normally on and have a negative threshold voltage.
From the standpoint of safety, however, it is highly desirable that a typical circuit including a power FET be normally off and have a positive threshold voltage.
FIG. 13A shows one example of a cross section of an AlGaN/GaN-HFET having the simplest structure. The group III nitride semiconductor (e.g. GaN) is formed, as a channel layer 901, over an appropriate substrate (a substrate made for example of SiC, Sapphire, Si, and GaN), a buffer layer (a buffer layer made of a combination of group III nitride semiconductors, particularly AlN, AlGaN, and GaN), or the like. A carrier supply layer 902 (e.g. AlGaN) having a larger band gap than the channel layer 901 is epitaxially grown. A 2DEG 903 is generated on a channel layer-side of an interface between the channel layer 901 and the carrier supply layer 902. A source electrode 904a and a drain electrode 904b that form ohmic contacts are then formed on the carrier supply layer 902. On a portion of the carrier supply layer 902 between these electrodes, a gate electrode 905 that forms a Schottky contact is formed. The source electrode 904a and the drain electrode 904b are each made of a combination of one or more types of metal such as Ti, Al, Mo, and Hf. The gate electrode 905 is made of a combination of one or more types of metal such as Ni, Pt, Pd, and Au.
Several reports have shown methods for achieving normally-off operation using the group III nitride semiconductors.
The most common method (Method 1) is a method of epitaxially growing the carrier supply layer 902 below the gate electrode 905 of the AlGaN/GaN-HFET structure so that the carrier supply layer 902 has a thickness of no more than several nanometers.
A method (Method 2) disclosed in paragraph [0016] of Patent Literature 1, which is a prior art reference, is as follows. Method 2 is shown in FIG. 13B. A portion of a carrier supply layer 912 under a gate electrode 915 of the AlGaN/GaN-HFET structure, which is similar to that shown in FIG. 13A, is etched by using a known technique so as to define a recess. This structure is typically called a recessed structure 916. By reducing the thickness of the portion of the carrier supply layer 912 under the gate, the threshold voltage is shifted in a positive direction. In order to achieve the normally-off operation with the typical AlGaN/GaN structure, a portion of an AlGaN layer under the gate electrode 915 is required to be etched so as to have a thickness of several nanometers.
FIG. 13C shows a method (Method 3) disclosed in Patent Literature 1. A carrier supply layer 922 having the recessed gate structure, which is similar to that shown in FIG. 13B, is divided into three parts when being epitaxially grown, and an etching stopper layer 927 made for example of GaN and a second carrier supply layer 928 made for example of AlGaN are sequentially formed on the carrier supply layer 922 made for example of AlGaN, over a 2DEG-side of an interface. In this case, it is desirable to use, as the etching stopper layer 927, a group III nitride semiconductor (e.g. GaN) that is easily depleted with a low voltage. This is because control over the threshold voltage is facilitated by stopping etching in the middle of the etching stopper layer 927.
FIG. 14A shows a method (Method 4) disclosed in Patent Literature 2. In Method 4, a carrier supply layer 932 below a gate electrode 935, which determines the threshold voltage, is epitaxially grown so as to have a thickness of several nanometers so that the normally-off operation can be achieved. A second carrier supply layer 939 is then grown, by using a known regrowth technique, over a portion of the carrier supply layer 932 other than a portion of the carrier supply layer 932 on which the gate electrode 935 is to be formed. With this method, a structure similar to the recessed gate structure can be made.
FIG. 14B shows a method (Method 5) disclosed in Patent Literature 3. As in Method 2, after formation of a recessed structure 946, a cap layer 950 made of a p-type group III nitride semiconductor (e.g. p-AlGaN) is formed only at and around the recessed structure 946. A source electrode 944a and a drain electrode 944b that form ohmic contacts are then formed. On the cap layer 950 between these electrodes, a gate electrode 945 that forms an ohmic contact is formed. Method 5 is different from the other four methods in that a p-type semiconductor is interposed between the gate electrode 945 and the carrier supply layer 942. The carrier supply layer 942 is typically of n-type when being made of a group III nitride semiconductor. Thus, a depletion layer is naturally formed between the cap layer 950, which is of p-type, and the carrier supply layer 942, and a 2DEG is depleted in a state where no voltage is applied. A portion of the carrier supply layer 942 under the gate is thus made to have a greater thickness to achieve normally-off operation.